Job description Role: ASIC Verification Engineer  Years of Experience:3 -10 Years  Qualification: BE/ME/BTECH/MTECH  Job Location: Bangalore Email your updated CV to saku@vlsijobs.net
Tags: System Verilog, OVM, VMM, OVM, VMM, OVM, VMM
Role: Verification Engineer
mustHaveSkills: [System Verilog, OVM, VMM, OVM, VMM]

Job Description: - Role: ASIC Verification Engineer Years of Experience: 3 to 8 Years Job Location: Chennai QUALIFICATIONS: BE/B.Tech/ME/M.Tech Professionals interested in exploring this opportunity, Can revert with your updated resume on saku@roljobs.com
Tags: PCIExpress, USB , DDR Memory, UVM, System Verilog
Role: Verification Engineers
mustHaveSkills: [PCIExpress, USB , DDR Memory, UVM, System Verilog ]

ASIC/VLSI/SOC Verification Engineer
Tags: verilog, system verilog
Role: Verification Engineer
mustHaveSkills: [verilog, system verilog]

ASIC/VLSI/SOC Verification Engineer
Tags: verilog, system verilog
Role: Verification Engineer
mustHaveSkills: [verilog, system verilog]

Job description Role: ASIC Verification Engineer  Years of Experience:3 -10 Years  Qualification: BE/ME/BTECH/MTECH  Job Location: Bangalore Email your updated CV to saku@vlsijobs.net
Tags: System Verilog, OVM, VMM, OVM, VMM, OVM, VMM
Role: Verification Engineer
mustHaveSkills: [System Verilog, OVM, VMM, OVM, VMM]

Verification Engineer
Tags: OVM, AVM, NVM, URM, UVM, VMM
Role:
mustHaveSkills: [OVM, AVM, NVM, URM, UVM, VMM]

Job Description:- * Proficiency in one or more HVL's a must (System Verilog). * Strong domain knowledge on one or more - PCIe,USB, Ethernet, ARM, AHB/AXI, AMBA * Should have worked on ASIC verification on at least one project with constrained random methodology (UVM/VMM/OVM). * Must be expert in...
Tags: "System Verilog"
Role: System Verilog Engineer
mustHaveSkills: ["System Verilog"]

ASIC Verification Engineer
Tags: SVA, OVM, VMM, Specman, UVM
Role:
mustHaveSkills: [SVA, OVM, VMM, Specman, UVM]

Verification Engineer
Tags: OVM, AVM, NVM, URM, UVM, VMM
Role:
mustHaveSkills: [OVM, AVM, NVM, URM, UVM, VMM]

Verification Engineer
Tags: OVM, AVM, NVM, URM, UVM, VMM
Role:
mustHaveSkills: [OVM, AVM, NVM, URM, UVM, VMM]

System verilog expert for Bangalore Verification using System verilog OR Specman Methodology : OVM, VMM. Expert in System verilog OR Specman Good in flow methodology with OVM/VMM Should be able to enhance the Verification Coverage, Code coverage Functional Coverage.
Tags: ASIC, System verilog, Specman, Vera, ASIC verfication, SoC verification, IP verification, Digital verification, System verilog, Specman, Vera, ASIC verfication, SoC verification, IP verification, Digital verification, System verilog, Specman, Vera, ASIC verfication, SoC verification, IP verification, Digital verification
Role: Verification engineer
mustHaveSkills: [ASIC, System verilog, Specman, Vera, ASIC verfication, SoC verification, IP verification, Digital verification, System verilog, Specman, Vera, ASIC verfication, SoC verification, IP verification, Digital verification]

Verification Engineer
Tags: OVM, AVM, NVM, URM, UVM, VMM
Role:
mustHaveSkills: [OVM, AVM, NVM, URM, UVM, VMM]

ASIC Verification Engineer Jobs openings @ Bangalore using System verilog/OVM/VMM/UVM Methodology : OVM, VMM,UVM Expert in System verilog Strong in flow methodology with OVM/VMM/UVM Email your updated CV to saku@vlsijobs.net
Tags: "ASIC"/"SOC", System Verilog, UVM, OVM, VMM, System Verilog, UVM, OVM, VMM
Role: ASIC Verification Engineer
mustHaveSkills: ["ASIC"/"SOC", System Verilog, UVM, OVM, VMM]

Verification Engineer
Tags: OVM, AVM, NVM, URM, UVM, VMM
Role:
mustHaveSkills: [OVM, AVM, NVM, URM, UVM, VMM]

System Verilog Engineer Jobs
Tags: SVA, OVM, VMM, Specman, UVM
Role: System Verilog Engineer
mustHaveSkills: [SVA, OVM, VMM, Specman, UVM]

Verification Engineer
Tags: OVM, AVM, NVM, URM, UVM, VMM
Role:
mustHaveSkills: [OVM, AVM, NVM, URM, UVM, VMM]

System Verilog Engineer
Tags: System verilog, ovm, vmm, UVM, AVM, UVM, AVM, UVM, AVM
Role: System Verilog Engineer
mustHaveSkills: [System verilog, ovm, vmm, UVM, AVM, UVM, AVM]

• Verification specialist working on customer projects – sometimes as the verification lead. • To support business development by working with potential customers to understand their verification requirements and develop innovative technical solutions to achieve the design win • Provide...
Tags: System verilog, OVM, UVM, VMM, RTL Verification, Verilog, ASCI Verification, RTL Verification, Verilog, ASCI Verification
Role: ASIC verification Specialist
mustHaveSkills: [System verilog, OVM, UVM, VMM, RTL Verification, Verilog, ASCI Verification]

Saturday( 5-Jan-13) walk in in Chennai. Work location: Bangalore Must Skills: Work Experience in System Verilog/ Verilog - Verilog/VHDL Language Proficency - One of the HVLs - Specman, System Verilog, Vera.. - Experience in Protocols like USB, PCIe, DDR Role description: - Verification...
Tags: Verilog
Role: System Verilog
mustHaveSkills: [Verilog]

Should have worked on SOC / ASIC  level verification on at least one project with constrained random methodology (eRM / VMM / OVM) Proficiency in System Verilog is a must. Strong domain knowledge on one or more of PCIe, USB, Ethernet, ARM, AHB / AXI, AMBA, PHY Layer is a must Must be expert in...
Tags: System Verilog, OVM, USB, VMM, UVM, PCIe, VMM, UVM, PCIe, VMM, UVM, PCIe
Role: ASIC Verification
mustHaveSkills: [System Verilog, OVM, USB, VMM, UVM, PCIe, VMM, UVM, PCIe]