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ASIC Jobs
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Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Sep-22 12:36 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-25 07:45 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. DFT ATPG. STA and Timing closure.
Updated:
2012-Aug-18 07:00 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-17 11:38 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Front End Design Jobs
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. DFT ATPG. STA and Timing closure.
Updated:
2012-Aug-17 11:30 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs at Noida
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-11 07:49 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-11 07:27 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. DFT ATPG. STA and Timing closure.
Updated:
2012-Aug-11 06:48 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. DFT ATPG. STA and Timing closure.
Updated:
2012-Aug-10 10:51 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-08 12:54 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-08 12:10 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Aug-08 11:50 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs in Greater Noida
Responsibilities : - Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Jul-21 06:07 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs at Noida
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Jul-21 05:37 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Jobs for Frontend design with Product based MNC at greater noida
a. Experience in the ASIC implementation of complex designs. b. Hands on Experience with Synthesis, DFT and STA. c. Expertise in Verilog and VHDL. d. Knowledge of scripting using Perl/Shell/TCL.
Updated:
2012-Jul-20 04:15 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Front end design
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Front End Design (VLSI) Jobs in Delhi/NCR
Responsibilities : - Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Jul-20 04:15 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: New Delhi NCR (India)
Employer:
ASIC DESIGN
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Jul-18 12:15 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
Digital ASIC Design Jobs
The job involves: a. Micro-architecture and RTL b. Synthesis and equivalence checks (low power Flow) c. DFT ATPG d. STA and Timing closure e. Interaction with the RTL / PD team to achieve area, timing and power goals
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Front-end digital ASIC design
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Front End Design Jobs in Greater Noida
Responsibilities : - Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Greater Noida (India)
Employer:
ASIC DESIGN
Jobs for Frontend design with Product based MNC at greater noida
a. Experience in the ASIC implementation of complex designs. b. Hands on Experience with Synthesis, DFT and STA. c. Expertise in Verilog and VHDL. d. Knowledge of scripting using Perl/Shell/TCL.
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Front end design
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
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