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ASIC Jobs in Pune
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FPGA Prototying jobs in Pune
Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs FPGA simulation and verification Lab-based analysis and debug on Hardware platforms
Updated:
2012-Mar-15 06:18 AM
By: Roland and AssociatesIndustry: SemiconductorRole: FPGA prototying
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Mar-20 12:19 PM
By: Roland and AssociatesIndustry: SemiconductorsRole: ASIC Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC verification, OVM, System Verilog, ASIC Verification Manager, Deloitte, Pune
We are currently looking for a Verification Manager at our Pune facility in India. Job responsibilities include: Team leadership of ASIC verification engineers Specification of test environment and test objectives Facilitate verification plan reviews with test team and design team Detail design...
Updated:
2012-Mar-31 12:01 PM
By: CambioIndustry: SemiconductorRole: ASIC Verification Manager
Experience Level: 12.0 to 20.0 yrsLocation: Pune (India)
Employer:
Deloitte
ASIC Implementation Jobs
Job Title : ASIC Implementation Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Pune, Chennai, Hyderabad Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA,...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: ASIC Implementation Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
ASIC Implementation Jobs
Job Title : ASIC Implementation Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Pune, Chennai, Hyderabad Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA,...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: ASIC Implementation Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
ASIC, System Verilog, VMM, Verification, ASIC Verifcation Engineer, Deloitte, Hyderabad Bangalore Pune
Duties responsibilities: · ASIC engineering development position. · Engineer will be responsible for aspects of ASIC development with a specific focus on verification. · Engineer will implement verification infrastructure including stimulus, checking and monitoring...
Updated:
2012-May-05 10:35 AM
By: CambioIndustry: HardwareRole: ASIC Verifcation Engineer
Experience Level: 5.0 to 15.0 yrsLocation: Hyderabad Bangalore Pune (India)
SOC Encounter Jobs
Job Title : SOC Encounter Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Hyderabad Pune, Chennai Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA, Static...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: SOC Encounter Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
SOC Encounter Jobs
Job Title : SOC Encounter Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Hyderabad Pune, Chennai Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA, Static...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: SOC Encounter Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
RTL to GDS Jobs
Job Title : RTL to GDS Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Pune, Chennai, Hyderabad Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA, Static...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL to GDS Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
SOC Encounter Jobs
Job Title : SOC Encounter Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Hyderabad Pune, Chennai Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA, Static...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: SOC Encounter Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
RTL to GDS Jobs
Job Title : RTL to GDS Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Pune, Chennai, Hyderabad Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA, Static...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL to GDS Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
Synthesis and STA Jobs
Job Title : Synthesis and STA Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Pune, Chennai, Hyderabad Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, Synthesis and STA,...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: Synthesis and STA Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
RTL to GDS Jobs
Job Title : RTL to GDS Engineer Experience : 1 - 15 Job Location : Bangalore, Ahmedabad, Pune, Chennai, Hyderabad Position exist at all levels. Skills : Physical Design, ASIC Backend, SOC encounter, Magma Talus, IC Compiler, floor planning, PnR, Placement and routing, synthesis and STA, Static...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL to GDS Engineer
Experience Level: 1.0 to 15.0 yrsLocation: Pune (India)
FPGA Prototyping jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: FPGA Prototyping
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
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