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Embedded C, Linux, Bluetooth, Software Engineer, Leading Global leader in Premium Audio, Pune
Job Description Job location : Pune Experience : 3 - 10 years Essential Responsibilities: * Design, develop and debug System SW in the field of wireless connectivity. ( Wifi,Bluetooth) with special emphasis on IP security. * Develop Integrate system SW with connectivity middleware and...
Updated:
2012-Aug-10 11:21 AM
By: Business FundamentalIndustry: IT ProductsRole: Software Engineer
Experience Level: 3.0 to 8.0 yrsLocation: Pune (India)
ASIC Design & Verification Lead Engineer jobs @ Pune
*The Senior Design Verification Lead Engineer would be responsible for design verification and implementation of test-benches for key EEBU technologies such as WLAN, Bluetooth, GPS. * Experienced in definition and implementation of complex test benches with System Verilog/ Vera/ SystemC/ Specman...
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Design & Verification Lead Engineer
Experience Level: 7.0 to 12.0 yrsLocation: Pune (India)
Employer:
Design Verification
C++, Bluetooth, RTOS, Bluetooth Developer, Pune
This is regarding an excellent opportunity for Bluetooth developers with our German based MNC Client, Pune. Please find below th JD and send your updated resume as oon as possible. Essential Responsibilities: Work on the Bluetooth Connectivity Domain which includes working integrating various...
Updated:
2012-Aug-18 06:39 AM
By: Value Vision Management ConsultantsIndustry: IT Products, IT ServicesRole: Bluetooth Developer
Experience Level: 3.0 to 8.0 yrsLocation: Pune (India)
C++, Bluetooth, RTOS, Bluetooth Developer, Pune
This is regarding an excellent opportunity for Bluetooth developers with our German based MNC Client, Pune. Please find below th JD and send your updated resume as oon as possible. Essential Responsibilities: Work on the Bluetooth Connectivity Domain which includes working integrating various...
Updated:
2012-Jul-31 06:35 AM
By: Value Vision Management ConsultantsIndustry: IT Products, IT ServicesRole: Bluetooth Developer
Experience Level: 3.0 to 8.0 yrsLocation: Pune (India)
ASIC Architecture Design Engineer jobs @ Pune
Job Description:- Role: Logic Design Job Location : Pune Years of Experience : 5 to 12 Years Education : BE/B.Tech/ME/M.Tech/MS Candidates interested in this opportunity can send the resume to saku@ vlsijobs.net
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: ASIC Design Engineer/ASIC Architecture Design Engineer
Experience Level: 5.0 to 12.0 yrsLocation: Pune (India)
Employer:
RTL Design Engineer
VLSI Verification Jobs in Pune
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-03 07:01 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
VLSI Verification Jobs in Pune
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-06 09:41 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
VLSI Verification Jobs in Pune
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-17 09:42 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
VLSI - Verification
VLSI - Verification The Role Primary responsibilities will include Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the...
Updated:
2012-Nov-12 05:36 AM
By: Roland and AssociatesIndustry: Semiconductor, HardwareRole: VLSI - Verification
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
VLSI Verification Jobs in Pune
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-05 01:07 PM
By: Cambio ConsultingIndustry: HardwareRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
VLSI Verification Jobs in Pune
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-05 10:35 AM
By: Cambio ConsultingIndustry: HardwareRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
ASIC Design Engineer Gigabit/ PCI Express at Pune.
Required Experience: ASIC Architecture Design Verilog RTL Design Verilog Simulation/Verification (Conventional, Assertion Based, Formal) RTL Synthesis, Equivalence Checking, Static Timing Analysis Design Debug and Validation Design Documentation Knowledge of PCI Express is a must Knowledge of...
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: IT ProductsRole: ASIC Design Engineer
Experience Level: 5.0 to 8.0 yrsLocation: Pune (India)
Employer:
Analog Layout
Jobs : ASIC Design Verification Lead Engineer @ Pune
Role Responsibility:- The Senior Design Engineer would be responsible for design verification and implementation of test-benches for key EEBU technologies such as Wireless LAN, Bluetooth, GPS, etc. The role is a Technical Lead role who can independently handle end to end verification. ...
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: ASIC Design Verification Lead
Experience Level: 9.0 to 15.0 yrsLocation: Pune (India)
Employer:
Design Verification
ASIC Design Verification Lead @ Pune - Salary 30 Lakhs+
The Senior Design Engineer would be responsible for design verification and implementation of test-benches for key EEBU technologies such as Wireless LAN, Bluetooth, GPS, etc. The role is a Technical Lead role who can independently handle end to end verification. ...
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: ASIC Design Verification
Experience Level: 10.0 to 15.0 yrsLocation: Pune (India)
Employer:
Design Verification
VLSI, UVM, RTL, System Verilog, Verification Engineer, Leading IT Professional Service Provider, Pune
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-08 08:12 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Jobs for VLSI Verification Engineer in Pune
VLSI-Verification Engineer Openings in Pune Exp Level: 2 to 5 Years Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the...
Updated:
2013-Apr-02 06:01 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Hardware Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Pune (India)
Employer:
Cambio Consulting
Jobs for VLSI Verification Engineer in Pune
VLSI-Verification Engineer Openings in Pune Exp Level: 2 to 5 Years Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the...
Updated:
2013-Apr-01 11:20 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Hardware Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Pune (India)
Employer:
Cambio Consulting
Jobs for VLSI Verification Engineer in Pune
VLSI-Verification Engineer Openings in Pune Exp Level: 2 to 5 Years Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the...
Updated:
2013-Apr-01 10:57 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Hardware Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Pune (India)
Employer:
Cambio Consulting
Jobs for VLSI Verification Engineer in Pune
VLSI-Verification Engineer Openings in Pune Exp Level: 2 to 5 Years Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the...
Updated:
2013-Apr-01 10:50 AM
By: Cambio ConsultingIndustry: Hardware, IT ProductsRole: Hardware Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Pune (India)
Employer:
Cambio Consulting
Jobs : Specman
Development of Verification Environment (VE) / Verification Component (VC) using Specman ‘e’ /system verilog Writing tests, functional coverage using ‘e’ and mapping these to Verification plan Functional verification of the design and achieve verification goals VHDL / Verilog RTL/Testbench coding
Updated:
2013-Apr-05 01:08 PM
By: Cambio ConsultingIndustry: HardwareRole: Verification Engineer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
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