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Logic BIST Jobs
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 9.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 8.0 to 9.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 7.0 to 8.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 6.0 to 7.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 5.0 to 6.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 4.0 to 5.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
BIST Simulation Expert
DFT Engineer
Updated:
2012-Jul-30 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor
Experience Level: 3.0 to 4.0 yrsLocation: Bangalore (India)
Employer:
DFT Engineers
Software Developer
Required 3 Software Developer foriWare Logic Technologies at Pune For more information dial 9218513783
Updated:
2013-May-18 07:51 AM
By: Rozgar SewaIndustry: IT-Software / Software ServicesRole: Software Developer
Experience Level: min 1.0 yrsLocation: Pune
Employer:
iWare Logic Technologies
Customer Care Executive
Required 3 Customer Care Executive for Global Logic Technology at Hyderabad For more information dial 040-30419999
Updated:
2013-Apr-03 12:08 PM
By: Rozgar SewaIndustry: ITES/ BPO/ KPO/ Customer Service/ OperationsRole: Customer Care Executive
Experience Level: min 0.0 yrsLocation: Hyderabad
Employer:
Global Logic Technology
DFT Engineer jobs at Bangalore
40nm/28nm design for test (DFT) methodology development and implementation You will participate in block and chip level DFT architecture design, working towards the successful implementation of LogicVision LogicBIST, TestKompress ATPG, and RAM BIST in our chips. Role Responsibility:-...
Updated:
2013-Mar-12 12:47 PM
By: Roland and AssociatesIndustry: SemiconductorRole: DFT
Experience Level: 3.0 to 12.0 yrsLocation: Bangalore (India)
DFT Experts @ Bangalore
Role:DFT Engineer Responsibilities: 40nm/28nm design for test (DFT) methodology development and implementation You will participate in block and chip level DFT architecture design, working towards the successful implementation of LogicVision LogicBIST, TestKompress ATPG, and RAM BIST in our...
Updated:
2013-Feb-04 09:33 AM
By: Roland and AssociatesIndustry: SemiconductorRole: DFT
Experience Level: 2.0 to 13.0 yrsLocation: Bangalore (India)
Physical design, Verification, DFT, Physical Design (Canada) /ASIC Verification / Logic Design / DFT / STA & Synthesis Openings
Physical Design (Canada) /ASIC Verification / Logic Design / DFT / STA Synthesis Openings.
Updated:
2012-Aug-14 12:37 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Physical Design (Canada) /ASIC Verification / Logic Design / DFT / STA & Synthesis Openings.
Experience Level: 1.0 to 16.0 yrsLocation: Bangalore (India)
Employer:
Semiconductor Jobs
Logic Design Engineer @ Bangalore
Strong micro-architecture and logic designing skills. Working exposure to chip level functional verification Good Knowledge of Verilog HDL language and RTL coding techniques with DFT techniques is a must. Experience with Processor is a must. Strong technical background in IC / SOC design and...
Updated:
2012-Aug-11 12:00 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Logic Design
Experience Level: 3.0 to 15.0 yrsLocation: Bangalore (India)
Employer:
RTL Design Engineer
Logic Design Engineer jobs
Job description: Position: Logic Design Engineer, Experience: 3 -15 Years, Location: Bangalore/Hyderabad/Pune, Qualification: B. E/B. Tech/M. Tech. Email your CV to saku@vlsijobs.net
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Logic Design Engineer
Experience Level: 3.0 to 15.0 yrsLocation: Bangalore Pune Hyderabad (India)
Employer:
RTL Design Engineer
DFT, ASIC, ATPG, BIST, VLSI, DFT Engineer, Leading IT Professional Service Provider, Bangalore
Must have prior full-chip DFT leadership experience handling large complex ASIC/SoC and should have handled at least one SoC tapeout. Should have hands-on experience with scan synthesis, scan DRC fixing, MBIST, LBIST, JTAG (IEEE 1149.1), On-chip scan compression techniques Block level and...
Updated:
2013-Mar-16 09:31 AM
By: Cambio ConsultingIndustry: HardwareRole: DFT Engineer
Experience Level: 3.0 to 13.0 yrsLocation: Bangalore (India)
BIST controllers, Flash Controller, Digital wrappers, IP DV Engineer, MNC Client of Peopleplusindia in Semiconductor Domain, Bangalore
Job Posting Title IP DV Engineer Job Description This role involves: Verification of system and peripheral IP modules commonly used for various functions in automotive systems to ensure 0 bug IPs. Some IP examples include Real-time BIST controllers,...
Updated:
2012-Jun-27 07:30 AM
By: PEOPLEPLUS INDIAIndustry: SemiconductorRole: IP DV Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Bangalore (India)
Employer:
MNC Client of Peopleplusindia in Semiconductor Domain
timing, clocking, BIST, Front End Digital Engineer, Leading Product Development Company, Bangalore
1. Drive key aspects of IP specification (timing, area, power, clocking, BIST/DFT, Application requirements etc.) 2. Developing micro-architecture of Comm. Peripherals, Memory/Flash Controllers given high level IP requirements. 3. RTL development for IPs meeting the Area/Timing and power goals...
Updated:
2012-Jun-27 07:21 AM
By: PEOPLEPLUS INDIAIndustry: SemiconductorRole: Front End Digital Engineer
Experience Level: 6.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Leading Product Development Company
Logic design Engineer jobs in Bangalore
Job Description:- Role: Logic Design Job Location : Bangalore Years of Experience : 3 to 15 Years Education : BE/B.Tech/ME/M.Tech/MS Candidates interested in this opportunity can send the resume to saku@ vlsijobs.net
Updated:
2012-Aug-11 12:00 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Logic Design Engineer
Experience Level: 3.0 to 15.0 yrsLocation: Bangalore (India)
Employer:
RTL Design Engineer
Logic Design Engineer jobs @ Bangalore
Job Details : ASIC/FPGA Design(Digital) Detailed Description of the Job Profile: This person will be leading a team of senior engineers. He will be involved in recruiting, training these engineers. He will be responsible for visiting customer site, understanding customer requirements as lead...
Updated:
2012-Jul-26 04:13 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Logic Design Engineer
Experience Level: 3.0 to 15.0 yrsLocation: Bangalore Hyderabad Noida (India)
Employer:
ASIC FPGA Engineers
Logic design Engineer jobs @ Hyderabad
Job Description:- Role: Logic Design Job Location : Hyderabad Years of Experience : 3 to 15 Years Education : BE/B.Tech/ME/M.Tech/MS Candidates interested in this opportunity can send the resume to saku@ vlsijobs.net
Updated:
2012-Jul-17 07:33 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Logic Design Engineer
Experience Level: 3.0 to 15.0 yrsLocation: Hyderabad (India)
Employer:
RTL Design Engineer
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