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SoC Design, RTL integration, Timing Closure, Verification, SoC Architecture, Constraints development, DFT, SoC Design Manager, MNC Client of Peopleplusindia in Semiconductor Domain, Bangalore
Manage a team of people (both internal and sub-contractors) Good team player, must work well with the team and external cross-functional teams (Program Manager, PE, Apps, Spec, Package) End-to-end SoC design, Automotive/Safety protocols, Direct interface to customer Planning, tracking, ensuring...
Updated:
2012-Apr-16 11:46 AM
By: PEOPLEPLUS INDIAIndustry: Communications and NetworkingRole: SoC Design Manager
Experience Level: 13.0 to 17.0 yrsLocation: Bangalore (India)
Employer:
MNC Client of Peopleplusindia in Semiconductor Domain
RTL Design Technical Team lead With Product Developmen MNC
- Hands on responsibilities for every aspect of ASIC development, RTL coding, verification, synthesis, test - Coordinate team's activities, develop plans, assign responsibilities, monitor progress, provide status reports - Recruit new hires; mentor and guide team members in technical activities...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design Technical Team lead
Experience Level: 4.0 to 8.0 yrsLocation: (India)
Opening for Design Engineer/Sr. Design Engineer - RTL - USB/MIPI US based Product Development MNC @ Bangalore
Job Description : To design, verify and deliver cutting-edge IP for integration into customers’ systems-on-chips. The technologies behind the IPs are in the areas of SD/MMC, MIPI, USB, PCIe and Ethernet. Will need to implement IPs based on various standards specifications. Interacts with...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: Design Engineer/Sr. Design Engineer - RTL
Experience Level: 3.0 to 9.0 yrsLocation: Bangalore (India)
Openings for RTL Design with USB in a product development MNC @ Bangalore
Front end design (interpret standards specifications, RTL design, documentation, verification, synthesis and timing.
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design
Experience Level: 3.0 to 6.0 yrsLocation: Bangalore (India)
Opening for RTL Design -USB with product Development MNC at Bangalore
Role : RTL Design Engineer Job Responsibiliti e s : Front end design (RTL design, documentation, verification, synthesis, and timing).
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: Senior RTL Design Engineer
Experience Level: 3.0 to 6.0 yrsLocation: Bangalore (India)
Openings for RTL Design with a product development MNC @ Bangalore
Front end design (interpret standards specifications, RTL design, documentation, verification, synthesis and timing.
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design
Experience Level: 3.0 to 6.0 yrsLocation: Bangalore (India)
Opening for RTL Design Engineer with product Development MNC at Bangalore
Role : RTL Design Engineer Job Responsibiliti e s : Front end design (RTL design, documentation, verification, synthesis, and timing).
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: Senior RTL Design Engineer
Experience Level: 3.0 to 6.0 yrsLocation: Bangalore (India)
RTL Design opening with a product development US based MNC @ Bangalore
Front end design (interpret standards specifications, RTL design, documentation, verification, synthesis and timing.
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design
Experience Level: 3.0 to 6.0 yrsLocation: Bangalore (India)
Openings for RTL Design with a product development MNC @ Bangalore - mail your resume to preetha.r@roljobs.com
Front end design (interpret standards specifications, RTL design, documentation, verification, synthesis and timing.
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design
Experience Level: 3.0 to 6.0 yrsLocation: Bangalore (India)
Mapping ASIC RTL to FPGA • Presilicon validation using FPGA • Post silicon validation • FPGA specific logic development • SW development for Diagnostics / Bringup / Validation • Test automation using scripting languages • Working closely with SW team for device drivers development & customer troubleshooting, Emulation Engineer, A Leading IT Company
Mapping ASIC RTL to FPGA • Presilicon validation using FPGA • Post silicon validation • FPGA specific logic development • SW development for Diagnostics / Bringup / Validation • Test automation using scripting languages • Working closely with SW team for device drivers development customer...
Updated:
2012-May-05 04:44 AM
By: AIM PLUS STAFFING SOLUTIONSIndustry: IT ProductsRole: Emulation Engineer
Experience Level: 12.0 to 18.0 yrsLocation: (India)
Employer:
A Leading IT Company
Front end digital design jobs in Bangalore
Drive key aspects of IP specification (timing, area, power, clocking, BIST/DFT, Application requirements etc.) 2. Developing micro-architecture of Comm. Peripherals, Memory/Flash Controllers given high level IP requirements. 3. RTL development for IPs meeting the Area/Timing and power goals and...
Updated:
2012-Feb-09 10:52 AM
By: PEOPLEPLUS INDIAIndustry: SemiconductorRole: Front End Digital Engineer
Experience Level: 6.0 to 10.0 yrsLocation: (India)
Employer:
Leading Product Development Company
RTL design Jobs in Bangalore
Front end design (RTL design, documentation, verification, synthesis, and timing.
Updated:
2012-Apr-30 12:47 PM
By: Roland and AssociatesIndustry: IT ProductsRole: Design Engineer
Experience Level: 3.0 to 5.0 yrsLocation: Bangalore (India)
RTL design Jobs
Front end design (RTL design, documentation, verification, synthesis, and timing).
Updated:
2012-Apr-26 12:58 PM
By: Roland and AssociatesIndustry: IT ProductsRole: Design Engineer
Experience Level: 3.0 to 5.0 yrsLocation: Bangalore (India)
RTL design Engineer Jobs
Front end design (RTL design, documentation, verification, synthesis, and timing).
Updated:
2012-Apr-30 09:49 AM
By: Roland and AssociatesIndustry: IT ProductsRole: Design Engineer
Experience Level: 3.0 to 5.0 yrsLocation: Bangalore (India)
timing, clocking, BIST, Front End Digital Engineer, Leading Product Development Company, Bangalore
1. Drive key aspects of IP specification (timing, area, power, clocking, BIST/DFT, Application requirements etc.) 2. Developing micro-architecture of Comm. Peripherals, Memory/Flash Controllers given high level IP requirements. 3. RTL development for IPs meeting the Area/Timing and power goals...
Updated:
2012-May-02 08:51 AM
By: PEOPLEPLUS INDIAIndustry: SemiconductorRole: Front End Digital Engineer
Experience Level: 6.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Leading Product Development Company
RTL Job Opening
1. Responsibilities include leading an RTL team. The team will be responsible for hardware design from definition to productization which includes microarchitecture definition, implementation, documentation, RTL code entry meeting timing, area and power requirements, synthesis, lint and drive...
Updated:
2012-May-23 05:49 AM
By: Carcon Staffing SolutionsIndustry: ITRole: Senior Design Engineer
Experience Level: 8.0 to 13.0 yrsLocation: (India)
Employer:
Semiconductor company
RTL Design Engineer Job in Chennai
RTL Design Engineer Job in Chennai
Updated:
2012-May-27 12:39 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design Engineer
Experience Level: 5.0 to 8.0 yrsLocation: Chennai (India)
RTL Design Engineer Job in Bangalore
RTL Design Engineer Job in Bangalore
Updated:
2012-May-27 12:39 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design Engineer
Experience Level: 5.0 to 8.0 yrsLocation: Chennai (India)
RTL Design Engineer Job in Chennai
RTL Design Engineer Job in Chennai
Updated:
2012-May-27 12:39 PM
By: Roland and AssociatesIndustry: SemiconductorRole: RTL Design Engineer
Experience Level: 5.0 to 9.0 yrsLocation: Chennai (India)
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