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Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
System Verilog Specialist
Hi, We Have a job openings with our client for Ahmedabad Location Job Requirements Qualification: BE/B-Tech/MTech Experience :2 - 6 years Experience in ASIC Verification with following tools System Verilog with OVM,VMM , Verilog can be an additional advantage Interested professionals...
Updated:
2012-Mar-08 07:32 PM
By: Roland and AssociatesIndustry: HardwareRole: System Verilog Specialist @Ahmedabad
Experience Level: 2.0 to 6.0 yrsLocation: Ahmedabad (India)
System Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: System Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
System Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: System Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
System Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: System Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
System Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: System Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
System Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: System Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
System Verilog jobs in Pune
Job Description Design and coding using VHDL FPGA prototyping which may require partitioning the core on two or more FPGAs. FPGA simulation and verification Exposure to a range of FPGA design tools (preferably Synopsys Certify and Synplify, Xilinx ISE) Multi-FPGA design partitioning Experience of...
Updated:
2012-Apr-16 10:38 AM
By: Roland and AssociatesIndustry: SemiconductorsRole: System Verilog Designer
Experience Level: 2.0 to 5.0 yrsLocation: Pune (India)
Verilog/VHDL Engineer Jobs
Familiarity with Verilog/VHDL and RTL simulations(modelsim is preferred) MBIST insertion with any EDA tool at chip level is mandatory Familiarity with DC synthesis Knowledge on Perl/TCL scripts is mandatory Formal verification with LEC, and debug is preferred Gate level simulation and debug with...
Updated:
2012-May-05 09:01 AM
By: WHIZCHIPRole: Verilog/VHDL Engineer
Experience Level: 3.0 to 5.0 yrsLocation:
Verilog, system verilog, Urgent Opening for Verfication Engineer, A Leading company into Semiconductor, Bangalore
• Core DD in Linux Audio/Video/Graphics/Camera/USB • DD protocols (HSP UART, Mproc, USB Standards) • Linux in BSP • Boot loader • System driverPI System
Updated:
2012-Apr-05 06:36 AM
By: SIE Brains TechnologyIndustry: Product, IT Services, IT ProductsRole: Urgent Opening for Verfication Engineer
Experience Level: 2.0 to 8.0 yrsLocation: Bangalore (India)
System Verilog Jobs in Bangalore
This is for an onsite opportunity to UK for initial 5- 6 months Key tasks / responsibilities : Verification specialist working on customer projects sometimes as the verification lead. To support business development by working with potential customers to understand their verification...
Updated:
2012-Feb-03 05:53 AM
By: PEOPLEPLUS INDIAIndustry: SemiconductorRole: Verification Specialists/Senior Verification Engineers
Experience Level: 5.0 to 11.0 yrsLocation: Bangalore (India)
Employer:
Leading Product Development Company
System Verilog Engineer
System Verilog Engineer
Updated:
2012-Apr-02 08:31 AM
By: Roland and AssociatesIndustry: SemiconductorRole: ASIC Verification Engineer
Experience Level: 3.0 to 8.0 yrsLocation: Bangalore (India)
System Verilog Engineer
System Verilog Engineer
Updated:
2012-Mar-14 12:14 PM
By: Roland and AssociatesIndustry: SemiconductorRole: ASIC Verification Engineer
Experience Level: 3.0 to 8.0 yrsLocation: Bangalore (India)
System Verilog Opportunities in Noida
System Verilog Jobs JD Positions : Exist at all levels Experience: 2 -15 Years Location : Bangalore, Hyderabad, Ahmedabad,Vishakhapatnam ,Noida Skills : System verilog, Vera, OVM, VMM, UVM Mail your CV to priyank.srivastava@roljobs.com with the following details current ctc : expected ctc :...
Updated:
2012-Apr-30 10:15 AM
By: Roland and AssociatesIndustry: SemiconductorRole: Verification Specialist
Experience Level: 2.0 to 15.0 yrsLocation: Noida (India)
System Verilog Opportunities in Hyderabad
System Verilog Jobs JD Positions : Exist at all levels Experience: 2 -15 Years Location : Bangalore, Hyderabad, Ahmedabad,Vishakhapatnam ,Noida Skills : System verilog, Vera, OVM, VMM, UVM Mail your CV to priyank.srivastava@roljobs.com with the following details current ctc : expected ctc :...
Updated:
2012-Apr-30 10:15 AM
By: Roland and AssociatesIndustry: SemiconductorRole: Verification Specialist
Experience Level: 2.0 to 15.0 yrsLocation: Hyderabad (India)
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