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Design Manager Engineering jobs in Bangalore
RESPONSIBILITES E xp i n sheet metal design Should have Design and Development experience in Sheet metal design/ Enclosure design. Knowledge of the design of tools and fixtures for component fabrication and assembly Working knowledge of manufacturing techniques and Value Engineering approaches
Updated:
2013-Jun-08 07:34 PM
By: Samvith TechnologiesIndustry: Industrial Products/Heavy MachineryRole: Design Manager Engineering– Cabinets & Enclosures
Experience Level: 8.0 to 18.0 yrsLocation: Bangalore (India)
ASIC Verification Engineer jobs @ Chennai
Job Description: - Role: ASIC Verification Engineer Years of Experience: 3 to 8 Years Job Location: Chennai QUALIFICATIONS: BE/B.Tech/ME/M.Tech Professionals interested in exploring this opportunity, Can revert with your updated resume on saku@roljobs.com
Updated:
2013-Jun-08 07:34 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: ASIC Verification Engineer
Experience Level: 3.0 to 8.0 yrsLocation: Chennai (India)
Employer:
Design Verification
System Verilog Engineer jobs @ USA (H1 is Must)
Job Description: - Role: ASIC Verification Engineer Years of Experience: 4 to 8 Years Job Location: Chennai QUALIFICATIONS: BE/B.Tech/ME/M.Tech Professionals interested in exploring this opportunity, Can revert with your updated resume on saku@roljobs.com
Updated:
2013-Jun-04 06:21 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: ASIC Verification Engineer
Experience Level: 4.0 to 8.0 yrsLocation: USA (United States)
Employer:
Design Verification
System Verilog Engineer jobs @ Chennai
Job description Role: ASIC Verification Engineer Years of Experience:4 -9 Years Qualification: BE/ME/BTECH/MTECH Job Location: Chennai Email your updated CV to saku@vlsijobs.net
Updated:
2013-Jun-04 06:14 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor, HardwareRole: Verification Engineer
Experience Level: 4.0 to 9.0 yrsLocation: Chennai (India)
Employer:
Design Verification
ASIC Verification Engineer Jobs at USA
ASIC Verification Engineer Good hands on exp in System verilog Exposure to any of the methodology Knowledge on any p rotocols
Updated:
2013-May-23 04:36 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Verification Engineer
Experience Level: 4.0 to 8.0 yrsLocation: California (United States)
Employer:
Design Verification
Verification engineers for Bangalore
ASIC Verification Engineer Good hands on exp in System verilog Exposure to any of the methodology Knowledge on any p rotocols
Updated:
2013-May-22 01:31 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Verification Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Bangalore (India)
Employer:
Design Verification
Onsite opportunity for Physical design engineers
Physical design engineers Expertise in Physical design tools Synopsys IC Compiler / Magma Talus / Cadence SoC Encounter Strong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing. Sound expertise in Tcl, Perl, Shell scripting
Updated:
2013-May-22 01:10 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Physical Design
Experience Level: 3.0 to 8.0 yrsLocation: Bangalore (India)
Employer:
Physical Design
ASIC Verification Engineers at Chennai
ASIC Verification Engineer Good hands on exp in System verilog Exposure to any of the methodology Knowledge on any p rotocols
Updated:
2013-May-22 12:57 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Verification Engineer
Experience Level: 4.0 to 8.0 yrsLocation: Chennai (India)
Employer:
Design Verification
System Verilog Experts
Job description Role: ASIC Verification Engineer Years of Experience:3 -10 Years Qualification: BE/ME/BTECH/MTECH Job Location: Bangalore Email your updated CV to saku@vlsijobs.net
Updated:
2013-May-18 07:34 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor, HardwareRole: Verification Engineer
Experience Level: 3.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
Design Verification
Physical Design Engineer jobs @ Noida
Job Description : 3 to 10 Year of experience in doing hands on physical design Preferred Magma Talus experience or Synopsys ICC on at least two project. St rong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing, DRC-LVS closure, timing closure,...
Updated:
2013-Apr-30 05:29 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Physical Design
Experience Level: 3.0 to 10.0 yrsLocation: Noida (India)
Employer:
Physical Design
System Verilog Experts
Job description Role: ASIC Verification Engineer Years of Experience:3 -10 Years Qualification: BE/ME/BTECH/MTECH Job Location: Bangalore Email your updated CV to saku@vlsijobs.net
Updated:
2013-Apr-30 05:27 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: Semiconductor, HardwareRole: Verification Engineer
Experience Level: 3.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
Design Verification
ASIC Physical Design Manager
ASIC Physical Design Manager jobs with a Product based MNC @ Bangalore Job Description : 6 to 12 Year of experience in doing hands on physical design Preferred Magma Talus experience or Synopsys ICC on at least two project. St rong fundamentals on Physical design including Floorplan, power grid...
Updated:
2013-Apr-30 05:26 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Physical Design Manager
Experience Level: 6.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Physical Design
Project Manager / Central Head Position for ASIC Verification Professionals @ Bangalore
Experience : 7 - 14 Years Location : Bangalore Skills : ASIC Verification / System Verilog 7+ yrs. of ASIC verification experience Experience in Leading a team of 6+ members Experience in defining complex verification environments and testbenches Experience with HVLs (SystemVerilog, e, Vera)...
Updated:
2013-Apr-30 05:15 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Project Manager / Central Head
Experience Level: 7.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Design Verification
Program Manager/Project Manager/Module Lead (ASIC Verification) jobs
Project Manager/Program Manager/MTS/SMTS/Module Lead (ASIC Verification) jobs with a Service based Company in Bangalore Role : Project Manager /Program Manager/Module Lead/SMTS/MTS Years of Experience : 5 to 10 Years Job Location : Bangalore Education:BE/BS/B.Tech/MS/ME/M.Tech Key...
Updated:
2013-Apr-30 05:14 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Program Manager/Project Manager/Module Lead
Experience Level: 5.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
Design Verification
Center Head (ASIC Verification) jobs @ Bangalore
Center Head (ASIC Verification) jobs @ Bangalore Job Description: Designation: Center Head Yrs of exp : 10 to 15 Years Job Location : Bangalore Key Responsibilities: Role Responsibility:- *As the Center Head / Program Manager/Project Manager, the person will have dual responsibility: 1. Head...
Updated:
2013-Apr-30 05:12 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Center Head
Experience Level: 10.0 to 15.0 yrsLocation: Bangalore (India)
Employer:
Design Verification
Physical design Manager
Physical design Manager Lead and manage a high performance physical design team with complete responsibility on the RTL to tapeout of DSP/SOC chips. The role requires strong technical ability to independently own and execute the physical design of complex high performance DSP-SOC chips in...
Updated:
2013-Apr-30 05:09 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Physical Design Manager
Experience Level: 6.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Physical Design
Physical Design Engineer jobs @ Bangalore
Job Description : 3 to 15 Year of experience in doing hands on physical design Preferred Magma Talus experience or Synopsys ICC on at least two project. St rong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing, DRC-LVS closure, timing closure,...
Updated:
2013-Apr-30 05:06 AM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Physical Design
Experience Level: 5.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
Physical Design
Verification Engineer Jobs at Noida
Would be working on Verification (Specman) with Verilog
Updated:
2012-Oct-25 07:49 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Verification Engineer
Experience Level: 1.0 to 2.0 yrsLocation: Noida (India)
Employer:
Design Verification
SOC Verification Jobs
To execute and implement Functional Verification of various blocks in a STB SoC using latest simulation tools and methodologies.
Updated:
2012-Sep-22 12:36 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: SOC Verification
Experience Level: 1.0 to 3.0 yrsLocation: Noida (India)
Employer:
Design Verification
Front End Design Jobs
Micro-architecture and RTL. - Synthesis and equivalence checks (low power Flow). - DFT ATPG. - STA and Timing closure. - Interaction with the RTL / PD team to achieve area, timing and power goals.
Updated:
2012-Sep-22 12:36 PM
By: Exclusive Portal for VLSI Jobs - An Initiative of Roland & Associates Industry: SemiconductorRole: Sr Embedded Engineer
Experience Level: 4.0 to 7.0 yrsLocation: Noida (India)
Employer:
ASIC DESIGN
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