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floorplanning Jobs in Bangalore
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Physical design Engineer openings in Bangalore and Hyderabad
Physical Design Engineers:
Updated:
2012-Jun-21 10:42 AM
By: CambioIndustry: Recruitment AgencyRole: Physical design engineer
Experience Level: 2.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Cambio Consulting India Pvt Ltd
Physical Design Jobs
Looking for professionals with hands on Physical Design experience ( ASICs, ASPs, Processors ). The Job involves handling high performance unit level integration for processor chip. ~ Responsibilities include, floorplanning, planning signal wires, pushing the data into lower level macros, ...
Updated:
2012-Jun-07 06:20 AM
By: CareerGreetIndustry: SemiconductorRole: Physical Design Engineer/Lead
Experience Level: 4.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Client of Han Digital Solution
Physical Design Jobs
Looking for professionals with hands on Physical Design experience ( ASICs, ASPs, Processors ). The Job involves handling high performance unit level integration for processor chip. ~Responsibilities include, floor planning, planning signal wires, pushing the data into lower level macros, ...
Updated:
2012-Jun-05 12:25 PM
By: CareerGreetIndustry: SemiconductorRole: Physical Design Engineer/Lead
Experience Level: 6.0 to 12.0 yrsLocation: Bangalore (India)
Employer:
Client of Han Digital Solution
Physical Design jobs in Bangalore
Looking for professionals with hands on Physical Design experience ( ASICs, ASPs, Processors ). The Job involves handling high performance unit level integration for processor chip. ~Responsibilities include, floorplanning, planning signal wires, pushing the data into lower level macros, ...
Updated:
2012-May-22 12:09 PM
By: CareerGreetIndustry: SemiconductorRole: Physical Design Engineer/Lead
Experience Level: 6.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
Client of Han Digital Solution
Job Openings for Physical Design Engineer
Job Openings for Physical Design Engineer Knowledge of ASIC design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or...
Updated:
2012-Jul-11 12:53 PM
By: Pylon Management ConsultingIndustry: HardwareRole: Design Engineering Staff
Experience Level: 4.0 to 12.0 yrsLocation: Bangalore (India)
Job Opportunities for Physical Design Engineer
Job Opportunities for Physical Design Engineer Knowledge of ASIC design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex...
Updated:
2012-Jul-11 12:37 PM
By: Pylon Management ConsultingIndustry: HardwareRole: Design Engineering Staff
Experience Level: 4.0 to 12.0 yrsLocation: Bangalore (India)
Excellent Opening With Top Most Client For Bangalore Location
Role : Circuit Design Engineer/Physcial Design Engineer Responsibilities : Circuit design involving memories, clocks and basic digital design Primary responsibilities include but not limited to: - Perform transistor level design involving clock grid design, flip flops, dynamic circuits, SRAMs,...
Updated:
2013-Feb-01 04:00 PM
By: Cambio ConsultingIndustry: HardwareRole: Circuit Design Engineer
Experience Level: 3.0 to 10.0 yrsLocation: Bangalore (India)
Hirings for Low Power Implementation Professionals @ Bangalore
Strong understanding of concepts in UPF and CPF Understanding of power aware libraries (UPF .libs) Experience in developing flows and methodologies for implementing UPF/CPF based floorplanning, Hands on expertise in low power Place and Route Knowledge in Power aware synthesis Knowledge in CLP
Updated:
2013-Mar-02 11:31 AM
By: Cambio ConsultingIndustry: SemiconductorRole: Power Aware Implementation Engineer
Experience Level: 5.0 to 10.0 yrsLocation: Bangalore (India)
Hirings In Bangalore For physical design & Ahmedabad
· Hands-on experience with Physical Design, Implementation, Synthesis, Timing Closure · Expertise in Floorplanning, Clock/Power Planning, Place Route, Physical Verification (DRC, LVS) is necessary · Exposure to multiple tapeouts, block-level and/or SoC-level work...
Updated:
2013-May-03 12:52 PM
By: Cambio ConsultingIndustry: SemiconductorRole: Physical Design Engineer
Experience Level: 4.0 to 15.0 yrsLocation: Bangalore (India)
Hirings In Bangalore For physical design & Ahmedabad
· Hands-on experience with Physical Design, Implementation, Synthesis, Timing Closure · Expertise in Floorplanning, Clock/Power Planning, Place Route, Physical Verification (DRC, LVS) is necessary · Exposure to multiple tapeouts, block-level and/or SoC-level work...
Updated:
2013-May-03 12:47 PM
By: Cambio ConsultingIndustry: SemiconductorRole: Physical Design Engineer
Experience Level: 4.0 to 15.0 yrsLocation: Bangalore (India)
Physical Design Hirings@ Bangalore
· Hands-on experience with Physical Design, Implementation, Synthesis, Timing Closure · Expertise in Floorplanning, Clock/Power Planning, Place Route, Physical Verification (DRC, LVS) is necessary · Exposure to multiple tapeouts, block-level and/or SoC-level work...
Updated:
2013-May-03 12:44 PM
By: Cambio ConsultingIndustry: SemiconductorRole: Physical Design Engineer
Experience Level: 4.0 to 15.0 yrsLocation: Bangalore (India)
Physical Design Hirings@ Bangalore
· Hands-on experience with Physical Design, Implementation, Synthesis, Timing Closure · Expertise in Floorplanning, Clock/Power Planning, Place Route, Physical Verification (DRC, LVS) is necessary · Exposure to multiple tapeouts, block-level and/or SoC-level work...
Updated:
2013-Apr-30 12:36 PM
By: Cambio ConsultingIndustry: SemiconductorRole: Physical Design Engineer
Experience Level: 4.0 to 15.0 yrsLocation: Bangalore (India)
Hirings for Physical Design Professionals @ Bangalore
· Hands-on experience with Physical Design, Implementation, Synthesis, Timing Closure · Expertise in Floorplanning, Clock/Power Planning, Place Route, Physical Verification (DRC, LVS) is necessary · Exposure to multiple tapeouts, block-level and/or SoC-level work...
Updated:
2013-Apr-30 12:32 PM
By: Cambio ConsultingIndustry: SemiconductorRole: Physical Design Engineer
Experience Level: 4.0 to 15.0 yrsLocation: Bangalore (India)
Senior Staff Engineer / Structural Physical Design Jobs in Malaysia
Job Description In this position, you will be responsible for the implementation of next generation System-on-Chip (SoC) Very Large Scale Integration (VLSI) designs. Strong communication skills are important as the job requires coordination and regular follow-up across multiple sites. Your...
Updated:
2012-Jul-10 06:45 AM
By: PEOPLEPLUS INDIAIndustry: SemiconductorRole: Senior Staff Engineer / Structural Physical Design Jobs in Malaysia
Experience Level: 8.0 to 15.0 yrsLocation: Bangalore (India)
Physical design engineer
In this position, you will be responsible for the implementation of next generation System-on-Chip (SoC) Very Large Scale Integration (VLSI) designs. Strong communication skills are important as the job requires coordination and regular follow-up across multiple sites. Your technical...
Updated:
2012-Jul-03 05:57 AM
By: PEOPLEPLUS INDIAIndustry: Semiconductor, Telecom/ISP, HardwareRole: Physical design engineer
Experience Level: 2.0 to 10.0 yrsLocation: Bangalore (India)
Employer:
Leading Product Development Company
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