Build your professional network on facebook via our app Go to app
 
 
Posted in Community :

Hardware Designers (VLSI)

 
Keywords : vlsi fpga
Activity: Question posted: 02 09 2009 11:31:01 +0000, 1 answers, 502 views, last activity 07 06 2010 20:18:08 +0000
 
Share
 
 
  Rate : 
 
 
  Answered by     Rohit Khanna, Project Leader/Managing Consultant, Accenture  | 02 19 2009 10:14:00 +0000
[ Delete ]
[ Edit ]
Not Rated

Front end design includes

[VHDL/VERILOG ENTRY]
[SIMULATOR-MODEL SIM]
[SYNTHESISER-LEONARDO-SPECTRUM TOOL OUTPUT IS
RTL DESCRIPTION]

Back end includes

[RTL DESCRIPTION INPUT TO FLOOR PLANNING TOOL]
[O/P IS I/P TO PLACEMENT TOOL]
[O/P IS I/P TO ROUTING TOOL]
[O/P IS I/P TO LAYOUT TOOL (CADENCE-VIRTUSO)]
[FINAL O/P IS IN GDS II FORMAT]
[GDS FORMAT IS I/P TO FOUNTRY THAT IS FOR
PHYSICAL MANUFACTURING OF IC]

 
Leading Recruitment Firm
Leading Recruitment Firm
Viewers also viewed
WE ALL HAVE HEARD 2012 END OF THE WORLD... I HAVE READ FEW THINGS ABOUT IT... AND I HAVE STARTED...
 
0 referals 15 arguments, 5969 views
Chacha Choudhary and Naagraj had there own era. Comics book makers are trying hard to create a...
 
2363 referals 31 arguments, 398 views
Yes Job Satisfaction is more important vs Finally Money moves everything
 
44 referals 19 arguments, 764 views
more...  
Unanswered Questions (66)
Dear all, I have joined one of the leading company on Aug 2010. Before joining, i had to sign a...
 
0 referals 0 answers, 0 views
sir this is R.V.Srinivas Research scholar andhra University, i am doing my mphil on retail...
 
1 referals 0 answers, 0 views